Compiler-driven Superpage Allocation

Students: Joshua Magee

Collaborators: Rajeev Indukuru (IBM)

Funding: Research Enhancement Program at Texas State

Period: 01/15/08 - 12/15/08

Most modern microprocessor-based systems provide support for superpages both at the hardware and software level. Judicious use of superpages can significantly cut down the number of TLB misses and improve overall system performance. However, indiscriminate superpage allocation results in page fragmentation and increased application footprint, which often outweigh the benefits of reduced TLB misses. Previous research has explored policies for smart allocation of superpages from an operating systems perspective. Our work proposes a compiler-based strategy for automatic and profitable memory allocation via superpages. A significant advantage of a compiler-based approach is the availability of data-reuse information within an application. Our strategy employs data-locality analysis to estimate the TLB demands of a program and uses this metric to determine if the program will benefit from superpage allocation. Apart from its obvious utility in improving TLB performance, this strategy can be used to improve the effectiveness of certain data-layout transformations and can be a useful tool in benchmarking and empirical tuning.


CRL research is supported with generous funding from the National Science Foundation, Department of Energy, Semiconductor Research Consortium (SRC), IBM, NVidia, Rice University and the Research Enhancement Program at Texas State University.


Apan Qasem
Department of Computer Science
Texas State University
601 University Dr
San Marcos, TX 78666

Office: Comal 307A
Phone: (512) 245-0347
Fax: (512) 245-8750
E-mail: apan "AT" txstate · edu