Power-aware Task Scheduling
PI: Dan Tamir (Texas State)
Students: Claudia Alvarado, Richard Hay
Collaborators: Lizy John (UT Austin)
Funding: Semiconductor Research Consortium (SRC)
Power is a dominant obstacle for significant cost performance improvements of VLSI technology. Excessive and unbalanced power consumption affects device reliability, requires expensive packaging, and causes irreversible damage to semiconductor devices. This project addresses multicore power monitoring, management, and control via power based task scheduling and load balancing; supporting hot-spot elimination as well as overall power balancing and reduction. We are investigating dynamic multicore power monitoring through power profiling of workloads. Monitoring is implemented by applying power profile information to task matching and scheduling in homogeneous and heterogeneous multicore systems so that power is better spread in time and "space (across cores) without affecting program semantics, with minimal performance degradation, and with a minimal number of thermal hot-spots. The novelty of this research stems from the use of new and innovative set of power indicators as well as novel utilization of these indicators for effective power aware task scheduling and hot-spot elimination. In addition, end users and compilers may be able to exploit the power profiling information to optimize program partition and task creation.